1. Field of the Invention
The present invention relates to an ion implantation system and a method of semiconductor manufacturing which implants ion beams formed from clusters of the N-type dopant cluster ions, such as As4Hx+ and P-type dopant cluster ions, such as B10Hx−.
2. Description of the Prior Art
The fabrication of semiconductor devices involves, in part, the introduction of impurities into the semiconductor substrate to form doped regions. The impurity elements are selected to bond appropriately with the semiconductor material to create an electrical carrier and change the electrical conductivity of the semiconductor material. The electrical carrier can either be an electron (generated by N-type dopants) or a hole (generated by P-type dopants). The concentration of introduced dopant impurities determines the electrical conductivity of the resultant region. Many such N- and P-type impurity regions must be created to form transistor structures, isolation structures and other such electronic structures, which collectively function as a semiconductor device.
The conventional method of introducing dopants into a semiconductor substrate is by ion implantation. In ion implantation, a feed material containing the desired element is introduced into an ion source and energy is introduced to ionize the feed material, creating ions which contain the dopant element (for example, the elements 75As, 11B, 115In, 31P, or 121Sb. An accelerating electric field is provided to extract and accelerate the typically positively-charged ions, thus creating an ion beam. Then, mass analysis is used to select the species to be implanted, as is known in the art, and the ion beam is directed at a semiconductor substrate. The accelerating electric field gives the ions kinetic energy, which allows the ions to penetrate into the target. The energy and mass of the ions determine their depth of penetration into the target, with higher energy and/or lower mass ions allowing deeper penetration into the target due to their greater velocity. The ion implantation system is constructed to carefully control the critical variables in the implantation process, such as the ion beam energy, ion beam mass, ion beam current (electrical charge per unit time), and ion dose at the target (total number of ions per unit area that penetrate into the target). Further, beam angular divergence (the variation in the angles at which the ions strike the substrate) and beam spatial uniformity and extent must also be controlled in order to preserve semiconductor device yields.
It has recently been recognized, for example, by Kishimoto et al., “A High-Current Negative-Ion Implanter and its Application for Nanocrystal Fabrication in Insulators”, IEEE Proceedings of the XIIth International Conference on Ion Implantation Technology, Kyoto, Japan, pp. 342-345 (1999), and Ishikawa et al., “Negative-Ion Implantation Technique”, Nuclear Instruments and Methods in Physics Research B 96, pp. 7-12 (1995), and others in the field that implanting negative ions offers advantages over implanting positive ions. One very important advantage of negative ion implantation is to reduce the ion implantation-induced surface charging of modem processor and memory devices during the manufacturing process. In general, the implantation of high currents (on the order of 1 mA or greater) of positive ions creates a positive potential on the gate oxides and other components of the semiconductor device which can easily exceed gate oxide damage thresholds. When a positive ion impacts the surface of a semiconductor device, it not only deposits a net positive charge, but liberates secondary electrons at the same time, multiplying the charging effect. Thus, equipment vendors of ion implantation systems have developed sophisticated charge control devices, so-called electron flood guns, to introduce low-energy electrons into the positively-charged ion beam and onto the surface of the device wafers during the implantation process. Such electron flood systems introduce additional variables into the manufacturing process, and cannot completely eliminate yield losses due to surface charging. As semiconductor devices become smaller and smaller, transistor operating voltages and gate oxide thicknesses become smaller as well, reducing the damage thresholds in semiconductor device manufacturing, further reducing yield. Hence, negative ion implantation potentially offers a substantial improvement in yield over conventional positive ion implantation for many leading-edge processes. Unfortunately, this technology is not yet commercially available, and indeed negative ion implantation has not to the author's knowledge been used to fabricate integrated circuits, even in research and development.
Prior art negative ion sources have relied upon so-called negative affinity sputter targets. A heavy inert gas, such as xenon, is fed into a plasma source which creates Xe+ ions. Once produced, the Xe+ ions are drawn to a negatively-biased sputter target which has been coated with cesium vapor or other suitable alkaline material. The energetic Xe+ ions sputter away the neutral target atoms, some of which pick up an electron while leaving the target surface due to the negative electron affinity of the cesium coating. Once negatively charged, the target ions are repelled from the target and can be collected from the ion source by electrostatic ion optics and focused into a negative ion beam. While it is possible to produce semiconductor dopant ions such as boron by this method, the ion currents tend to be low, the beam emittance tends to be large, and the presence of cesium vapor presents a nearly unacceptable risk to wafer yield, since alkaline metals are considered very serious contaminants to silicon processing. Hence, a more commercially viable negative ion source technology is needed.
Of particular interest in semiconductor manufacturing process is the formation of p-n junctions within the semiconductor substrate. This requires the formation of adjacent regions of n-type and p-type doping. One general example of the formation of a junction is the implantation of n-type dopant into a semiconductor region already containing a uniform distribution of p-type dopant. In such a case, an important parameter is the junction depth, which is defined as the depth from the semiconductor surface at which the n-type and p-type dopants have equal concentrations. This junction depth is dependent primarily on the implanted dopant mass, energy and dose.
An important aspect of modem semiconductor technology is the continuous evolution to smaller and faster devices. This process is called scaling. Scaling is driven by the continuous development of improvements to the lithographic process, allowing the definition of smaller and smaller features in the semiconductor substrate containing the integrated circuit. A generally accepted scaling theory has been developed to guide chip manufacturers in the appropriate resize of all aspects of the semiconductor device design at the same time, i.e., at each technology or scaling node. The greatest impact of scaling on ion implantation process is the scaling of junction depths, which requires increasingly shallow junctions as the device dimensions are decreased. The requirement for increasingly shallow junctions as integrated circuit technology scales translates into the following requirement: ion implantation energies must be reduced with each scaling step. Recently, the ion energy required for many critical implants has decreased to the point that conventional ion implantation systems, which were originally developed to generate much higher energy beams, are not effective at providing the necessary implant. These extremely shallow junctions are termed “Ultra-Shallow Junctions” or USJ.
The limitations of conventional ion implantation systems at low beam energy are most evident in the extraction of ions from the ion source, and their subsequent transport through the implanter's beam line. Ion extraction is governed by the Child-Langmuir relation which states that the extracted beam current density is proportional to the extraction voltage (i.e., beam energy at extraction) raised to the 3/2 power. FIG. 1 is a graph of maximum extracted arsenic beam current versus extraction voltage. For simplicity, an assumption has been made that only 75As+ ions are present in the extracted beam. FIG. 1 shows that as the energy is reduced, extraction current drops quickly. In a conventional ion implanter this regime of “extraction-limited” operation is seen at energies less than about 10 keV. Similar constraints occur in transporting the low-energy beam. A lower energy ion beam travels with lower velocity, and hence for a given value of beam current the ions are closer together, i.e., the ion density increases. This can be seen from the relation J=nev, where J is the ion beam current density in mA/cm2, n is the ion density in cm−3, e is the electronic charge (=6.02×10−19 Coulombs), and ν is the average ion velocity in cm/s. Since the electrostatic force between ions is inversely proportional to the square of the distance between them, this mutually repulsive force is much stronger at low energy, and thus disperses the ion beam. This phenomenon is called “beam blow-up”. While low-energy electrons present in the implanter's beam line tend to be trapped by the positively-charged ion beam and help compensate for space-charge blow-up during transport, nevertheless blow-up still occurs, and most pronounced in the presence of electrostatic focusing lenses, which tend to strip away the loosely-bound, highly mobile compensating electrons from the beam. Low-energy beam transport can be difficult for massive atoms such as arsenic (75 amu), since at a given ion energy, the ion velocity is lower than for lighter atoms. Severe extraction and transport difficulties also exist for the p-type dopant, boron. Boron transport is made difficult by the extremely low implantation energies (e.g., less than 1 keV) required by certain leading edge processes, and the fact that most of the ions extracted and transported from a typical BF3 source plasma are not the desired ion 11B+, but rather ion fragments, such as 19F+ and 49BF2+, which serve to increase the charge density and average mass of the extracted ion beam. Looking to the future of VLSI semiconductor manufacturing, these difficulties in transporting significant currents of low-energy As and B combine to make the formation of USJ very challenging.
One way to benefit from the Child-Langmuir equation discussed above is to increase the mass of the ion, for example, as illustrated in FIG. 1a, by ionizing a molecule containing the dopant of interest, rather than a dopant atom. In this way, while the kinetic energy of the molecule is higher during transport, upon entering the substrate, the molecule breaks up into its constituent atoms, sharing the energy of the molecule among the individual atoms according to their distribution in mass, so that the dopant atom's implantation energy is much lower than its original transport kinetic energy. Consider a dopant atom “X” bound to a radical “Y” (disregarding for argument's sake the question of whether “Y” affects the device-forming process). If the ion XY+ were implanted in lieu of X+, then XY+ must be extracted and transported at a higher energy, increased by a factor equal to the {(mass of XY)/(mass of X)}; this ensures that the velocity of X remains unchanged. Since the space-charge effects described by the Child-Langmuir equation discussed above are superlinear with respect to ion energy, the maximum transportable ion current is increased. Historically, the use of polyatomic molecules to address the problems of low energy implantation is known in the art. A common example has been the use of the BF2+ molecular ion for the implantation of low-energy boron, in lieu of B+. This process dissociates BF3 feed gas to the BF2+ ion for implantation. In this way, the ion mass is increased to 49 AMU, allowing an increase of the extraction and transport energy by almost a factor of 5 (i.e., 49/11) over using single boron atoms. Upon implantation, however, the boron energy is reduced by the same factor of (49/11). We note that this approach does not reduce the current density in the beam, since there is only one boron atom per unit charge in the beam. In addition, this process also implants fluorine atoms into the semiconductor substrate along with the boron, however fluorine has been known to exhibit adverse effects on the semiconductor device.
There has also been molecular ion work using decaborane as a polyatomic molecule, for ion implantation, as reported by Jacobson et al., “Decaborane, an alternative approach to ultra low energy ion implantation”, IEEE Proceedings of the XIIIth International Conference on Ion Implantation Technology, Alpsbach, Austria, pp. 300-303 (2000), and by Yamada, “Applications of gas cluster ion beams for materials processing”, Materials Science and Engineering A217/218, pp. 82-88 (1996). In this case, the implanted particle was an ion of the decaborane molecule, B10H14, which contains 10 boron atoms, and is therefore a “cluster” of boron atoms. This technique not only increases the mass of the ion, but for a given ion current, it substantially increases the implanted dose rate, since the decaborane ion B10Hx+ has ten boron atoms per unit charge. This is a very promising technology for the formation of USJ p-type metal-oxide-semiconductor (PMOS) transistors in silicon, and in general for implanting very low-energy boron. Significantly reducing the electrical current carried in the ion beam (by a factor of 10 in the case of decaborane ions), not only reduces beam space-charge effects, but wafer charging effects as well. Since charging of the wafer, particularly the gate oxides, by positive ion beam bombardment, is know to reduce device yields by damaging sensitive gate isolation, such a reduction in electrical current through the use of cluster ion beams is very attractive for USJ device manufacturing, which must increasingly accomodate exceedingly low gate threshold voltages. It is to be noted that in these two examples of P-type molecular implantation, the ions are created by simple ionization of the feed material rather than by the conglomeration of feed material into clusters. It is also to be noted that there has not, until now, been a comparable technology developed for producing n-type molecular dopant ions. The future success of complementary metal-oxide-semiconductor (CMOS) processing may well depend on the commercialization of viable N- and P-type polyatomic implantation technologies. Thus there is a need to solve two distinct problems facing the semiconductor manufacturing industry today: wafer charging, and low productivity in low-energy ion implantation.
Ion implanters have historically been segmented into three fundamental types: high current, medium current, and high energy implanters. Cluster beams are useful for high current and medium-current implantation processes. More particularly, today's high current implanters are primarily used to form the low-energy, high dose regions of the transistor such as drain structures and doping of the polysilicon gates. They are typically batch implanters, i.e., processing many wafers mounted on a spinning disk, while the ion beam remains stationary. High current beam lines tend to be simple and incorporate a large acceptance of the ion beam; at low energy and high currents, the beam at the substrate tends to be large, with a large angular divergence. Medium-current implanters typically incorporate a serial (one wafer at a time) process chamber, which offers a high tilt capability (e.g., up to 60 degrees from substrate normal). The ion beam is typically electromagnetically scanned across the wafer in an orthogonal direction, to ensure dose uniformity. In order to meet commercial implant dose uniformity and repeatability requirements of typically only a few percent variance, the ion beam should have excellent angular and spatial uniformity (angular uniformity of beam on wafer of <2 deg, for example). Because of these requirements, medium-current beam lines are engineered to give superior beam control at the expense of limited acceptance. That is, the transmission efficiency of the ions through the implanter is limited by the emittance of the ion beam. Presently, the generation of higher current (about 1 mA) ion beams at low (<10 keV) energy is problematic in serial implanters, such that wafer throughput is unacceptably low for certain lower-energy implants (for example, in the creation of source and drain structures in leading-edge CMOS processes). Similar transport problems also exist for batch implanters (processing many wafers mounted on a spinning disk) at the low beam energies of <5 keV per ion.
While it is possible to design beam transport optics which are nearly aberration-free, the ion beam characteristics (spatial extent, spatial uniformity, angular divergence and angular uniformity) are nonetheless largely determined by the emittance properties of the ion source itself (i.e., the beam properties at ion extraction which determine the extent to which the implanter optics can focus and control the beam as emitted from the ion source). The use of cluster beams instead of monomer beams can significantly enhance the emittance of an ion beam by raising the beam transport energy and reducing the electrical current carried by the beam. Thus, there is a need for cluster ion and cluster ion source technology in semiconductor manufacturing to provide a better-focused, more collimated and more tightly controlled ion beam on target, in addition to providing higher effective dose rates and higher throughputs.